summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
diff options
context:
space:
mode:
authorOwen Anderson <resistor@mac.com>2011-08-17 18:14:48 +0000
committerOwen Anderson <resistor@mac.com>2011-08-17 18:14:48 +0000
commit187e1e46f98618502d53fa67eaab8950cc54413a (patch)
tree7915b711b5200c4193c559c1ca7a11480b9d0ed8 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parentd7749be2d78419632b50427f074cd7a2feacd1f0 (diff)
downloadbcm5719-llvm-187e1e46f98618502d53fa67eaab8950cc54413a.tar.gz
bcm5719-llvm-187e1e46f98618502d53fa67eaab8950cc54413a.zip
Be more careful in the Thumb decoder hooks to avoid walking off the end of the OpInfo array.
llvm-svn: 137838
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp20
1 files changed, 12 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 98cdc64746a..a585dcbb291 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -329,17 +329,18 @@ extern MCInstrDesc ARMInsts[];
// that as a post-pass.
static void AddThumb1SBit(MCInst &MI, bool InITBlock) {
const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
+ unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
MCInst::iterator I = MI.begin();
- for (unsigned i = 0, e = MI.size(); i < e; ++i, ++I) {
+ for (unsigned i = 0; i < NumOps; ++i, ++I) {
+ if (I == MI.end()) break;
if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) {
+ if (i > 0 && OpInfo[i-1].isPredicate()) continue;
MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR));
return;
}
}
- if (OpInfo[MI.size()].isOptionalDef() &&
- OpInfo[MI.size()].RegClass == ARM::CCRRegClassID)
- MI.insert(MI.end(), MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR));
+ MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR));
}
// Most Thumb instructions don't have explicit predicates in the
@@ -367,8 +368,10 @@ void ThumbDisassembler::AddThumbPredicate(MCInst &MI) const {
CC = ARMCC::AL;
const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
+ unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
MCInst::iterator I = MI.begin();
- for (unsigned i = 0, e = MI.size(); i < e; ++i, ++I) {
+ for (unsigned i = 0; i < NumOps; ++i, ++I) {
+ if (I == MI.end()) break;
if (OpInfo[i].isPredicate()) {
I = MI.insert(I, MCOperand::CreateImm(CC));
++I;
@@ -380,11 +383,12 @@ void ThumbDisassembler::AddThumbPredicate(MCInst &MI) const {
}
}
- MI.insert(MI.end(), MCOperand::CreateImm(CC));
+ I = MI.insert(I, MCOperand::CreateImm(CC));
+ ++I;
if (CC == ARMCC::AL)
- MI.insert(MI.end(), MCOperand::CreateReg(0));
+ MI.insert(I, MCOperand::CreateReg(0));
else
- MI.insert(MI.end(), MCOperand::CreateReg(ARM::CPSR));
+ MI.insert(I, MCOperand::CreateReg(ARM::CPSR));
}
// Thumb VFP instructions are a special case. Because we share their
OpenPOWER on IntegriCloud