summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
diff options
context:
space:
mode:
authorBob Wilson <bob.wilson@apple.com>2010-06-11 21:34:50 +0000
committerBob Wilson <bob.wilson@apple.com>2010-06-11 21:34:50 +0000
commit6eae520de934f6e3aa60e976e3efa37fa7a39a72 (patch)
tree98347f2c4c9386ff1d807b8de71ae65b2731de8c /llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
parent571e864e84fd580a0a0b6281d4b49c6999dcab48 (diff)
downloadbcm5719-llvm-6eae520de934f6e3aa60e976e3efa37fa7a39a72.tar.gz
bcm5719-llvm-6eae520de934f6e3aa60e976e3efa37fa7a39a72.zip
Add instruction encoding for the Neon VMOV immediate instruction. This changes
the machine instruction representation of the immediate value to be encoded into an integer with similar fields as the actual VMOV instruction. This makes things easier for the disassembler, since it can just stuff the bits into the immediate operand, but harder for the asm printer since it has to decode the value to be printed. Testcase for the encoding will follow later when MC has more support for ARM. llvm-svn: 105836
Diffstat (limited to 'llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp')
-rw-r--r--llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp50
1 files changed, 32 insertions, 18 deletions
diff --git a/llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
index 2b94b76087e..b59852ebfcb 100644
--- a/llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
+++ b/llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
@@ -779,22 +779,36 @@ void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum,
O << '#' << MI->getOperand(OpNum).getImm();
}
-void ARMInstPrinter::printHex8ImmOperand(const MCInst *MI, unsigned OpNum,
- raw_ostream &O) {
- O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xff);
-}
-
-void ARMInstPrinter::printHex16ImmOperand(const MCInst *MI, unsigned OpNum,
- raw_ostream &O) {
- O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xffff);
-}
-
-void ARMInstPrinter::printHex32ImmOperand(const MCInst *MI, unsigned OpNum,
- raw_ostream &O) {
- O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xffffffff);
-}
-
-void ARMInstPrinter::printHex64ImmOperand(const MCInst *MI, unsigned OpNum,
- raw_ostream &O) {
- O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm());
+void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum,
+ raw_ostream &O) {
+ unsigned Imm = MI->getOperand(OpNum).getImm();
+ unsigned OpCmode = (Imm >> 8) & 0x1f;
+ unsigned Imm8 = Imm & 0xff;
+ uint64_t Val = 0;
+
+ if (OpCmode == 0xe) {
+ // 8-bit vector elements
+ Val = Imm8;
+ } else if ((OpCmode & 0xc) == 0x8) {
+ // 16-bit vector elements
+ unsigned ByteNum = (OpCmode & 0x6) >> 1;
+ Val = Imm8 << (8 * ByteNum);
+ } else if ((OpCmode & 0x8) == 0) {
+ // 32-bit vector elements, zero with one byte set
+ unsigned ByteNum = (OpCmode & 0x6) >> 1;
+ Val = Imm8 << (8 * ByteNum);
+ } else if ((OpCmode & 0xe) == 0xc) {
+ // 32-bit vector elements, one byte with low bits set
+ unsigned ByteNum = (OpCmode & 0x1);
+ Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (1 - ByteNum)));
+ } else if (OpCmode == 0x1e) {
+ // 64-bit vector elements
+ for (unsigned ByteNum = 0; ByteNum < 8; ++ByteNum) {
+ if ((Imm >> ByteNum) & 1)
+ Val |= (uint64_t)0xff << (8 * ByteNum);
+ }
+ } else {
+ assert(false && "Unsupported NEON immediate");
+ }
+ O << "#0x" << utohexstr(Val);
}
OpenPOWER on IntegriCloud