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| author | Richard Barton <richard.barton@arm.com> | 2012-07-09 18:30:56 +0000 |
|---|---|---|
| committer | Richard Barton <richard.barton@arm.com> | 2012-07-09 18:30:56 +0000 |
| commit | 984d0ba6b66899d7e40b2b07bb9261c4cf0a16fb (patch) | |
| tree | 8443dfc374c43b98eed9e66d8b1ddb28f2438e7b /llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
| parent | 5beef2d24287408c6172dd54831ac664fd89c923 (diff) | |
| download | bcm5719-llvm-984d0ba6b66899d7e40b2b07bb9261c4cf0a16fb.tar.gz bcm5719-llvm-984d0ba6b66899d7e40b2b07bb9261c4cf0a16fb.zip | |
Some formatting to keep Clang happy
llvm-svn: 159948
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 790125314d0..44977201abd 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -7300,8 +7300,8 @@ processInstruction(MCInst &Inst, if ((isARMLowRegister(Inst.getOperand(1).getReg()) && isARMLowRegister(Inst.getOperand(2).getReg())) && Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() && - (!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR || - inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) && + ((!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR) || + (inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR)) && (!static_cast<ARMOperand*>(Operands[3])->isToken() || !static_cast<ARMOperand*>(Operands[3])->getToken().equals_lower(".w"))) { unsigned NewOpc; @@ -7339,8 +7339,8 @@ processInstruction(MCInst &Inst, isARMLowRegister(Inst.getOperand(2).getReg())) && (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() || Inst.getOperand(0).getReg() == Inst.getOperand(2).getReg()) && - (!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR || - inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) && + ((!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR) || + (inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR)) && (!static_cast<ARMOperand*>(Operands[3])->isToken() || !static_cast<ARMOperand*>(Operands[3])->getToken().equals_lower(".w"))) { unsigned NewOpc; |
