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authorTim Northover <tnorthover@apple.com>2019-04-23 13:50:13 +0000
committerTim Northover <tnorthover@apple.com>2019-04-23 13:50:13 +0000
commit6af366be8ad3199f715c54e84c779e02bb8c18b8 (patch)
treecac009ac0d69d139c87e571135751e2ded6aeb92 /llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
parenta6be919c9298c3a62e415bd9fac1ad32229be526 (diff)
downloadbcm5719-llvm-6af366be8ad3199f715c54e84c779e02bb8c18b8.tar.gz
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ARM: disallow add/sub to sp unless Rn is also sp.
The manual says that Thumb2 add/sub instructions are only allowed to modify sp if the first source is also sp. This is slightly different from the usual rGPR restriction since it's context-sensitive, so implement it in C++. llvm-svn: 358987
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 65c6a566c04..9bc232a09ae 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -6792,6 +6792,20 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
}
break;
+ case ARM::t2ADDri:
+ case ARM::t2ADDri12:
+ case ARM::t2ADDrr:
+ case ARM::t2ADDrs:
+ case ARM::t2SUBri:
+ case ARM::t2SUBri12:
+ case ARM::t2SUBrr:
+ case ARM::t2SUBrs:
+ if (Inst.getOperand(0).getReg() == ARM::SP &&
+ Inst.getOperand(1).getReg() != ARM::SP)
+ return Error(Operands[4]->getStartLoc(),
+ "source register must be sp if destination is sp");
+ break;
+
// Final range checking for Thumb unconditional branch instructions.
case ARM::tB:
if (!(static_cast<ARMOperand &>(*Operands[2])).isSignedOffset<11, 1>())
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