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author | Oliver Stannard <oliver.stannard@arm.com> | 2017-10-03 14:38:52 +0000 |
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committer | Oliver Stannard <oliver.stannard@arm.com> | 2017-10-03 14:38:52 +0000 |
commit | 0d5c792223592de1be70773683075d6dd30d5b63 (patch) | |
tree | 3155dd8d0a25de92070cc90cbd45ee666f7ef7b1 /llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
parent | 41dfac3eb2f74339ed4a56211c91d7902453624d (diff) | |
download | bcm5719-llvm-0d5c792223592de1be70773683075d6dd30d5b63.tar.gz bcm5719-llvm-0d5c792223592de1be70773683075d6dd30d5b63.zip |
[ARM] Use table-gen'd assembly operand diags in ARM asm parser
This switches the ARM AsmParser to use assembly operand diagnostics from
tablegen, rather than a switch statement on the ARMMatchResultTy. It
moves the existing diagnostic strings to tablegen, but adds no new ones,
so this is NFC except for one diagnostic string that had an off-by-1 error
in the hand-written switch statement.
Differential revision: https://reviews.llvm.org/D31607
llvm-svn: 314804
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 77 |
1 files changed, 1 insertions, 76 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index ad6d64db8c8..49b412f4b73 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -623,7 +623,6 @@ public: SmallString<128> Message; }; - const char *getOperandMatchFailDiag(ARMMatchResultTy Error); void FilterNearMisses(SmallVectorImpl<NearMissInfo> &NearMissesIn, SmallVectorImpl<NearMissMessage> &NearMissesOut, SMLoc IDLoc, OperandVector &Operands); @@ -10095,80 +10094,6 @@ extern "C" void LLVMInitializeARMAsmParser() { #define GET_MATCHER_IMPLEMENTATION #include "ARMGenAsmMatcher.inc" -const char *ARMAsmParser::getOperandMatchFailDiag(ARMMatchResultTy Error) { - switch (Error) { - case Match_AlignedMemoryRequiresNone: - case Match_DupAlignedMemoryRequiresNone: - return "alignment must be omitted"; - case Match_AlignedMemoryRequires16: - case Match_DupAlignedMemoryRequires16: - return "alignment must be 16 or omitted"; - case Match_AlignedMemoryRequires32: - case Match_DupAlignedMemoryRequires32: - return "alignment must be 32 or omitted"; - case Match_AlignedMemoryRequires64: - case Match_DupAlignedMemoryRequires64: - return "alignment must be 64 or omitted"; - case Match_AlignedMemoryRequires64or128: - case Match_DupAlignedMemoryRequires64or128: - return "alignment must be 64, 128 or omitted"; - case Match_AlignedMemoryRequires64or128or256: - return "alignment must be 64, 128, 256 or omitted"; - case Match_ImmRange0_1: - return "immediate operand must be in the range [0,1]"; - case Match_ImmRange0_3: - return "immediate operand must be in the range [0,3]"; - case Match_ImmRange0_7: - return "immediate operand must be in the range [0,7]"; - case Match_ImmRange0_15: - return "immediate operand must be in the range [0,15]"; - case Match_ImmRange0_31: - return "immediate operand must be in the range [0,31]"; - case Match_ImmRange0_32: - return "immediate operand must be in the range [0,32]"; - case Match_ImmRange0_63: - return "immediate operand must be in the range [0,63]"; - case Match_ImmRange0_239: - return "immediate operand must be in the range [0,239]"; - case Match_ImmRange0_255: - return "immediate operand must be in the range [0,255]"; - case Match_ImmRange0_4095: - return "immediate operand must be in the range [0,4095]"; - case Match_ImmRange0_65535: - return "immediate operand must be in the range [0,65535]"; - case Match_ImmRange1_7: - return "immediate operand must be in the range [1,7]"; - case Match_ImmRange1_8: - return "immediate operand must be in the range [1,8]"; - case Match_ImmRange1_15: - return "immediate operand must be in the range [1,15]"; - case Match_ImmRange1_16: - return "immediate operand must be in the range [1,16]"; - case Match_ImmRange1_31: - return "immediate operand must be in the range [1,31]"; - case Match_ImmRange1_32: - return "immediate operand must be in the range [1,32]"; - case Match_ImmRange1_64: - return "immediate operand must be in the range [1,64]"; - case Match_ImmRange8_8: - return "immediate operand must be 8."; - case Match_ImmRange16_16: - return "immediate operand must be 16."; - case Match_ImmRange32_32: - return "immediate operand must be 32."; - case Match_ImmRange256_65535: - return "immediate operand must be in the range [255,65535]"; - case Match_ImmRange0_16777215: - return "immediate operand must be in the range [0,0xffffff]"; - case Match_InvalidComplexRotationEven: - return "complex rotation must be 0, 90, 180 or 270"; - case Match_InvalidComplexRotationOdd: - return "complex rotation must be 90 or 270"; - default: - return nullptr; - } -} - // Process the list of near-misses, throwing away ones we don't want to report // to the user, and converting the rest to a source location and string that // should be reported. @@ -10199,7 +10124,7 @@ ARMAsmParser::FilterNearMisses(SmallVectorImpl<NearMissInfo> &NearMissesIn, SMLoc OperandLoc = ((ARMOperand &)*Operands[I.getOperandIndex()]).getStartLoc(); const char *OperandDiag = - getOperandMatchFailDiag((ARMMatchResultTy)I.getOperandError()); + getMatchKindDiag((ARMMatchResultTy)I.getOperandError()); // If we have already emitted a message for a superclass, don't also report // the sub-class. We consider all operand classes that we don't have a |