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| author | Tim Northover <Tim.Northover@arm.com> | 2012-09-22 11:18:12 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2012-09-22 11:18:12 +0000 |
| commit | 0c97e76492534528bb45ee7b7366bc59590718f7 (patch) | |
| tree | 3a3144645d3d3fcf43fddb5f0fc23576d7aa1f66 /llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
| parent | 6cba23a6494e51044bc0f01b35bca7d65808a3fe (diff) | |
| download | bcm5719-llvm-0c97e76492534528bb45ee7b7366bc59590718f7.tar.gz bcm5719-llvm-0c97e76492534528bb45ee7b7366bc59590718f7.zip | |
Fix the handling of edge cases in ARM shifted operands.
This patch fixes load/store instructions to handle less common cases
like "asr #32", "rrx" properly throughout the MC layer.
Patch by Chris Lidbury.
llvm-svn: 164455
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 3e68a0b865a..bc711dc35f0 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -4444,6 +4444,12 @@ bool ARMAsmParser::parseMemRegOffsetShift(ARM_AM::ShiftOpc &St, ((St == ARM_AM::lsl || St == ARM_AM::ror) && Imm > 31) || ((St == ARM_AM::lsr || St == ARM_AM::asr) && Imm > 32)) return Error(Loc, "immediate shift value out of range"); + // If <ShiftTy> #0, turn it into a no_shift. + if (Imm == 0) + St = ARM_AM::lsl; + // For consistency, treat lsr #32 and asr #32 as having immediate value 0. + if (Imm == 32) + Imm = 0; Amount = Imm; } |
