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authorFlorian Hahn <florian.hahn@arm.com>2017-05-24 10:18:57 +0000
committerFlorian Hahn <florian.hahn@arm.com>2017-05-24 10:18:57 +0000
commitd211fe7c26ae6ea98c309611a85f1def97bd0a64 (patch)
treeb440cd978c6fbb4873a744995ca290ebb97f39c9 /llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
parent0dc2ad1b1316bd6ef7ae4d011c989d359c4e1d82 (diff)
downloadbcm5719-llvm-d211fe7c26ae6ea98c309611a85f1def97bd0a64.tar.gz
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[ARM] Remove ThumbTargetMachines. (NFC)
Summary: Thumb code generation is controlled by ARMSubtarget and the concrete ThumbLETargetMachine and ThumbBETargetMachine are not needed. Eric Christopher suggested removing the unneeded target machines in https://reviews.llvm.org/D33287. I think it still makes sense to keep separate TargetMachines for big and little endian as we probably do not want to have different endianess for difference functions in a single compilation unit. The MIPS backend has two separate TargetMachines for big and little endian as well. Reviewers: echristo, rengolin, kristof.beyls, t.p.northover Reviewed By: echristo Subscribers: aemerson, javed.absar, arichardson, llvm-commits Differential Revision: https://reviews.llvm.org/D33318 llvm-svn: 303733
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetObjectFile.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetObjectFile.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp b/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
index 94f9e8dfebb..edbf2b99126 100644
--- a/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
@@ -30,8 +30,8 @@ using namespace dwarf;
void ARMElfTargetObjectFile::Initialize(MCContext &Ctx,
const TargetMachine &TM) {
- const ARMTargetMachine &ARM_TM = static_cast<const ARMTargetMachine &>(TM);
- bool isAAPCS_ABI = ARM_TM.TargetABI == ARMTargetMachine::ARMABI::ARM_ABI_AAPCS;
+ const ARMBaseTargetMachine &ARM_TM = static_cast<const ARMBaseTargetMachine &>(TM);
+ bool isAAPCS_ABI = ARM_TM.TargetABI == ARMBaseTargetMachine::ARMABI::ARM_ABI_AAPCS;
genExecuteOnly = ARM_TM.getSubtargetImpl()->genExecuteOnly();
TargetLoweringObjectFileELF::Initialize(Ctx, TM);
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