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authorRafael Espindola <rafael.espindola@gmail.com>2013-12-17 21:28:36 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2013-12-17 21:28:36 +0000
commit9704fd03d155efbfbe3dba41b84b78ab8841fb32 (patch)
tree0a27a374478da72bab470fe76bcc919620e23b6d /llvm/lib/Target/ARM/ARMTargetMachine.cpp
parent5f513f9b4a551a279c3a72245c9b2883627449e7 (diff)
downloadbcm5719-llvm-9704fd03d155efbfbe3dba41b84b78ab8841fb32.tar.gz
bcm5719-llvm-9704fd03d155efbfbe3dba41b84b78ab8841fb32.zip
Handle i64 first for clarity. No functionality change.
llvm-svn: 197524
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp11
1 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 0c9e0a47201..960f5ca5ed2 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -76,13 +76,14 @@ static std::string computeDataLayout(ARMSubtarget &ST) {
if (ST.isThumb())
Ret += "-i1:8:32-i8:8:32-i16:16:32";
- // We have 64 bits floats and integers. The APCS ABI requires them to be
- // aligned s them to 32 bits, others to 64 bits. We always try to align to
- // 64 bits.
+ // ABIs other than APC have 64 bit integers with natural alignment.
+ if (!ST.isAPCS_ABI())
+ Ret += "-i64:64";
+
+ // We have 64 bits floats. The APCS ABI requires them to be aligned to 32
+ // bits, others to 64 bits. We always try to align to 64 bits.
if (ST.isAPCS_ABI())
Ret += "-f64:32:64";
- else
- Ret += "-i64:64";
// We have 128 and 64 bit vectors. The APCS ABI aligns them to 32 bits, others
// to 64. We always ty to give them natural alignment.
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