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authorRafael Espindola <rafael.espindola@gmail.com>2013-12-17 21:36:54 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2013-12-17 21:36:54 +0000
commit8c08120dba79e1c4cbcfb7b71d693b41c67cdfa2 (patch)
tree2d5b27ff12992fbfc20b20d845601a3ee6ce521b /llvm/lib/Target/ARM/ARMTargetMachine.cpp
parentf2db7626f0c2faf2147cb23c4eadcea0e4cf8e7d (diff)
downloadbcm5719-llvm-8c08120dba79e1c4cbcfb7b71d693b41c67cdfa2.tar.gz
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On APCS, only try to align aggregates to 32 bits instead of 64.
This matches clang's behavior and since it is only a preference, it is not an ABI issue. llvm-svn: 197526
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 960f5ca5ed2..b46ec1da0e8 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -92,9 +92,9 @@ static std::string computeDataLayout(ARMSubtarget &ST) {
else
Ret += "-v128:64:128";
- // An aggregate of size 0 is ABI aligned to 0.
- // FIXME: explain better what this means.
- if (ST.isThumb())
+ // On thumb and APCS, only try to align aggregates to 32 bits (the default is
+ // 64 bits).
+ if (ST.isThumb() || ST.isAPCS_ABI())
Ret += "-a:0:32";
// Integer registers are 32 bits.
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