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authorJim Grosbach <grosbach@apple.com>2009-11-15 21:45:34 +0000
committerJim Grosbach <grosbach@apple.com>2009-11-15 21:45:34 +0000
commit01c1cae34d68de646f262a19440c61c6f3479b5b (patch)
treec1cb265286862e1c8dbaf041e332cca45ccf7280 /llvm/lib/Target/ARM/ARMTargetMachine.cpp
parent74ae3e5b0efdb637c061cded4e086ae48539734d (diff)
downloadbcm5719-llvm-01c1cae34d68de646f262a19440c61c6f3479b5b.tar.gz
bcm5719-llvm-01c1cae34d68de646f262a19440c61c6f3479b5b.zip
Detect need for autoalignment of the stack earlier to catch spills more
conservatively. eliminateFrameIndex() machinery adjust to handle addr mode 6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling llvm-svn: 88874
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 4d20a5c1a03..2564ed92547 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -93,6 +93,10 @@ bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
if (Subtarget.hasNEON())
PM.add(createNEONPreAllocPass());
+ // Calculate and set max stack object alignment early, so we can decide
+ // whether we will need stack realignment (and thus FP).
+ PM.add(createARMMaxStackAlignmentCalculatorPass());
+
// FIXME: temporarily disabling load / store optimization pass for Thumb1.
if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
PM.add(createARMLoadStoreOptimizationPass(true));
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