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| author | Tim Northover <tnorthover@apple.com> | 2013-10-07 11:10:47 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-10-07 11:10:47 +0000 |
| commit | f86d1f0b7742806d5fe1469044e2a384a73057a0 (patch) | |
| tree | a7f0a661bbe001d5cc49fe4dbf22f251ec0f3195 /llvm/lib/Target/ARM/ARMSubtarget.h | |
| parent | 17a44966be8655ccc7772d842bda554f72cedcbd (diff) | |
| download | bcm5719-llvm-f86d1f0b7742806d5fe1469044e2a384a73057a0.tar.gz bcm5719-llvm-f86d1f0b7742806d5fe1469044e2a384a73057a0.zip | |
ARM: allow cortex-m0 to use hint instructions
The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.
rdar://problem/15144406
llvm-svn: 192097
Diffstat (limited to 'llvm/lib/Target/ARM/ARMSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index 11d8e8e6d66..7c7e402036c 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -44,12 +44,13 @@ protected: ARMProcClassEnum ARMProcClass; /// HasV4TOps, HasV5TOps, HasV5TEOps, - /// HasV6Ops, HasV6T2Ops, HasV7Ops, HasV8Ops - + /// HasV6Ops, HasV6MOps, HasV6T2Ops, HasV7Ops, HasV8Ops - /// Specify whether target support specific ARM ISA variants. bool HasV4TOps; bool HasV5TOps; bool HasV5TEOps; bool HasV6Ops; + bool HasV6MOps; bool HasV6T2Ops; bool HasV7Ops; bool HasV8Ops; |
