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author | Diana Picus <diana.picus@linaro.org> | 2016-06-23 07:47:35 +0000 |
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committer | Diana Picus <diana.picus@linaro.org> | 2016-06-23 07:47:35 +0000 |
commit | c5baa43f53b1dd76758c8a1f6b45fc5ed043aea7 (patch) | |
tree | 1f13049fc03c81bc094eaa9c5c1ca4d0f974cdbf /llvm/lib/Target/ARM/ARMSubtarget.h | |
parent | 597aa42fec46332e1267e4234cd9d258ac4e5b53 (diff) | |
download | bcm5719-llvm-c5baa43f53b1dd76758c8a1f6b45fc5ed043aea7.tar.gz bcm5719-llvm-c5baa43f53b1dd76758c8a1f6b45fc5ed043aea7.zip |
[ARM] Do not test for CPUs, use SubtargetFeatures (Part 1). NFCI
This is a cleanup commit similar to r271555, but for ARM.
The end goal is to get rid of the isSwift / isCortexXY / isWhatever methods.
Since the ARM backend seems to have quite a lot of calls to these methods, I
intend to submit 5-6 subtarget features at a time, instead of one big lump.
Differential Revision: http://reviews.llvm.org/D21432
llvm-svn: 273544
Diffstat (limited to 'llvm/lib/Target/ARM/ARMSubtarget.h')
-rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index 1eeb6224206..3c1797d858a 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -218,6 +218,24 @@ protected: /// particularly effective at zeroing a VFP register. bool HasZeroCycleZeroing; + /// If true, if conversion may decide to leave some instructions unpredicated. + bool IsProfitableToUnpredicate; + + /// If true, VMOV will be favored over VGETLNi32. + bool HasSlowVGETLNi32; + + /// If true, VMOV will be favored over VDUP. + bool HasSlowVDUP32; + + /// If true, VMOVSR will be favored over VMOVDRR. + bool PreferVMOVSR; + + /// If true, ISHST barriers will be used for Release semantics. + bool PreferISHST; + + /// If true, VMOVRS, VMOVSR and VMOVS will be converted from VFP to NEON. + bool UseNEONForFPMovs; + /// StrictAlign - If true, the subtarget disallows unaligned memory /// accesses for some types. For details, see /// ARMTargetLowering::allowsMisalignedMemoryAccesses(). @@ -376,6 +394,12 @@ public: bool hasTrustZone() const { return HasTrustZone; } bool has8MSecExt() const { return Has8MSecExt; } bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; } + bool isProfitableToUnpredicate() const { return IsProfitableToUnpredicate; } + bool hasSlowVGETLNi32() const { return HasSlowVGETLNi32; } + bool hasSlowVDUP32() const { return HasSlowVDUP32; } + bool preferVMOVSR() const { return PreferVMOVSR; } + bool preferISHSTBarriers() const { return PreferISHST; } + bool useNEONForFPMovs() const { return UseNEONForFPMovs; } bool prefers32BitThumb() const { return Pref32BitThumb; } bool avoidCPSRPartialUpdate() const { return AvoidCPSRPartialUpdate; } bool avoidMOVsShifterOperand() const { return AvoidMOVsShifterOperand; } |