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| author | Renato Golin <renato.golin@linaro.org> | 2014-10-08 12:26:16 +0000 |
|---|---|---|
| committer | Renato Golin <renato.golin@linaro.org> | 2014-10-08 12:26:16 +0000 |
| commit | bab5ace6aa5285ea554c46ff3af8bc5d179abf8c (patch) | |
| tree | cab5b0b41a28448b08299e1cd2030fe04a185067 /llvm/lib/Target/ARM/ARMSubtarget.h | |
| parent | 51dc3f4701ac3d24b971a2561ba5a1a4433339a0 (diff) | |
| download | bcm5719-llvm-bab5ace6aa5285ea554c46ff3af8bc5d179abf8c.tar.gz bcm5719-llvm-bab5ace6aa5285ea554c46ff3af8bc5d179abf8c.zip | |
Refactor isThumb1Only() && isMClass() into a predicate called isV6M()
This must be enforced for all v6M cores, not just the cortex-m0,
irregardless of the user-specified alignment.
Patch by Charlie Turner.
llvm-svn: 219300
Diffstat (limited to 'llvm/lib/Target/ARM/ARMSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index c6e756c53b7..8c85ad73ac7 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -405,6 +405,10 @@ public: bool isRClass() const { return ARMProcClass == RClass; } bool isAClass() const { return ARMProcClass == AClass; } + bool isV6M() const { + return isThumb1Only() && isMClass(); + } + bool isR9Reserved() const { return IsR9Reserved; } bool useMovt(const MachineFunction &MF) const; |
