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| author | Bob Wilson <bob.wilson@apple.com> | 2010-09-29 17:54:10 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-09-29 17:54:10 +0000 |
| commit | 97bf273870265c3977b6485d37a93f026b567daf (patch) | |
| tree | a89ccd9d69411acad3443a4fc6e059c6c9c99a19 /llvm/lib/Target/ARM/ARMSubtarget.h | |
| parent | 620f9d1548a56350e7ad31e1eae85439ecb28382 (diff) | |
| download | bcm5719-llvm-97bf273870265c3977b6485d37a93f026b567daf.tar.gz bcm5719-llvm-97bf273870265c3977b6485d37a93f026b567daf.zip | |
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned. Radar 8489376.
llvm-svn: 115047
Diffstat (limited to 'llvm/lib/Target/ARM/ARMSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index aefd130b9a8..1188c6dedd9 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -218,7 +218,7 @@ protected: std::string getDataLayout() const { if (isThumb()) { if (isAPCS_ABI()) { - return std::string("e-p:32:32-f64:32:32-i64:32:32-" + return std::string("e-p:32:32-f64:32:64-i64:32:64-" "i16:16:32-i8:8:32-i1:8:32-" "v128:32:128-v64:32:64-a:0:32-n32"); } else { @@ -228,7 +228,7 @@ protected: } } else { if (isAPCS_ABI()) { - return std::string("e-p:32:32-f64:32:32-i64:32:32-" + return std::string("e-p:32:32-f64:32:64-i64:32:64-" "v128:32:128-v64:32:64-n32"); } else { return std::string("e-p:32:32-f64:64:64-i64:64:64-" |
