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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-27 17:46:40 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-27 17:46:40 +0000 |
| commit | 6f2a526101bfef214aef8cae8dba4a9cce55b6fa (patch) | |
| tree | 7fdf854c43b57af4354e0d48aec858b4e72b18be /llvm/lib/Target/ARM/ARMSubtarget.h | |
| parent | b3cd5a1037d71e33b2519fcaf66e2978679f3c22 (diff) | |
| download | bcm5719-llvm-6f2a526101bfef214aef8cae8dba4a9cce55b6fa.tar.gz bcm5719-llvm-6f2a526101bfef214aef8cae8dba4a9cce55b6fa.zip | |
Add alignment value to allowsUnalignedMemoryAccess
Rename to allowsMisalignedMemoryAccess.
On R600, 8 and 16 byte accesses are mostly OK with 4-byte alignment,
and don't need to be split into multiple accesses. Vector loads with
an alignment of the element type are not uncommon in OpenCL code.
llvm-svn: 214055
Diffstat (limited to 'llvm/lib/Target/ARM/ARMSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index f8283b08d48..be0e8d2b218 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -188,7 +188,7 @@ protected: /// AllowsUnalignedMem - If true, the subtarget allows unaligned memory /// accesses for some types. For details, see - /// ARMTargetLowering::allowsUnalignedMemoryAccesses(). + /// ARMTargetLowering::allowsMisalignedMemoryAccesses(). bool AllowsUnalignedMem; /// RestrictIT - If true, the subtarget disallows generation of deprecated IT |
