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authorAkira Hatanaka <ahatanaka@apple.com>2015-07-16 00:58:23 +0000
committerAkira Hatanaka <ahatanaka@apple.com>2015-07-16 00:58:23 +0000
commit024d91a00b8580ad9a59a350ebbba157531bde2e (patch)
tree9f0a8465224cf8a808d56c46849412de53c4ac94 /llvm/lib/Target/ARM/ARMSubtarget.cpp
parent580efb24757f6393ff5cb069f13ea79800f306c4 (diff)
downloadbcm5719-llvm-024d91a00b8580ad9a59a350ebbba157531bde2e.tar.gz
bcm5719-llvm-024d91a00b8580ad9a59a350ebbba157531bde2e.zip
[ARM] Define a subtarget feature that is used to avoid using movt/movw
pairs for 32-bit immediates. This change is needed to avoid emitting movt/movw pairs when doing LTO and do so on a per-function basis. Out-of-tree projects currently using cl::opt option -arm-use-movt=0 or false to avoid emitting movt/movw pairs should make changes to add subtarget feature "+no-movt" (see the changes made to clang in r242368). rdar://problem/21529937 Differential Revision: http://reviews.llvm.org/D11026 llvm-svn: 242369
Diffstat (limited to 'llvm/lib/Target/ARM/ARMSubtarget.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMSubtarget.cpp12
1 files changed, 4 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index 002c3e9b629..31b65f2bfec 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -44,9 +44,6 @@ ReserveR9("arm-reserve-r9", cl::Hidden,
cl::desc("Reserve R9, making it unavailable as GPR"));
static cl::opt<bool>
-ArmUseMOVT("arm-use-movt", cl::init(true), cl::Hidden);
-
-static cl::opt<bool>
UseFusedMulOps("arm-use-mulops",
cl::init(true), cl::Hidden);
@@ -148,7 +145,7 @@ void ARMSubtarget::initializeEnvironment() {
HasThumb2 = false;
NoARM = false;
IsR9Reserved = ReserveR9;
- UseMovt = false;
+ NoMovt = false;
SupportsTailCall = false;
HasFP16 = false;
HasD16 = false;
@@ -215,8 +212,6 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
if (isTargetNaCl())
stackAlignment = 16;
- UseMovt = hasV6T2Ops() && ArmUseMOVT;
-
if (isTargetMachO()) {
IsR9Reserved = ReserveR9 || !HasV6Ops;
SupportsTailCall = !isTargetIOS() || !getTargetTriple().isOSVersionLT(5, 0);
@@ -337,8 +332,9 @@ bool ARMSubtarget::useMovt(const MachineFunction &MF) const {
// NOTE Windows on ARM needs to use mov.w/mov.t pairs to materialise 32-bit
// immediates as it is inherently position independent, and may be out of
// range otherwise.
- return UseMovt && (isTargetWindows() ||
- !MF.getFunction()->hasFnAttribute(Attribute::MinSize));
+ return !NoMovt && hasV6T2Ops() &&
+ (isTargetWindows() ||
+ !MF.getFunction()->hasFnAttribute(Attribute::MinSize));
}
bool ARMSubtarget::useFastISel() const {
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