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| author | Evan Cheng <evan.cheng@apple.com> | 2010-09-29 22:42:35 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-09-29 22:42:35 +0000 |
| commit | 4a010fd1eac964a9d60fa87dfc1841dcb666335b (patch) | |
| tree | f96f67bd6eb3406c7d39592d271b4c6d8455c652 /llvm/lib/Target/ARM/ARMScheduleA8.td | |
| parent | 2016f0eaacab149a4bfdba5f500e13d03f08846e (diff) | |
| download | bcm5719-llvm-4a010fd1eac964a9d60fa87dfc1841dcb666335b.tar.gz bcm5719-llvm-4a010fd1eac964a9d60fa87dfc1841dcb666335b.zip | |
Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP
pipeline forwarding path.
llvm-svn: 115098
Diffstat (limited to 'llvm/lib/Target/ARM/ARMScheduleA8.td')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMScheduleA8.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMScheduleA8.td b/llvm/lib/Target/ARM/ARMScheduleA8.td index e6b2beae038..8962ec93efa 100644 --- a/llvm/lib/Target/ARM/ARMScheduleA8.td +++ b/llvm/lib/Target/ARM/ARMScheduleA8.td @@ -36,6 +36,7 @@ def CortexA8Itineraries : ProcessorItineraries< InstrItinData<IIC_iALUi ,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2]>, InstrItinData<IIC_iALUr ,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 2]>, InstrItinData<IIC_iALUsi,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 1]>, + InstrItinData<IIC_iALUsir,[InstrStage<1,[A8_Pipe0, A8_Pipe1]>], [2, 1, 2]>, InstrItinData<IIC_iALUsr,[InstrStage<1, [A8_Pipe0, A8_Pipe1]>], [2, 2, 1, 1]>, // // Bitwise Instructions that produce a result |
