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authorEvan Cheng <evan.cheng@apple.com>2006-11-27 23:37:22 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-11-27 23:37:22 +0000
commit20350c4025259b6a85089936bcdea17b84fd1f23 (patch)
tree017059993f024c77c6eb5c30c26f47e10d7d749e /llvm/lib/Target/ARM/ARMRegisterInfo.h
parent5230e9175aca9bc1c09c2065708ee86d3533593a (diff)
downloadbcm5719-llvm-20350c4025259b6a85089936bcdea17b84fd1f23.tar.gz
bcm5719-llvm-20350c4025259b6a85089936bcdea17b84fd1f23.zip
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands. llvm-svn: 31947
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterInfo.h')
-rw-r--r--llvm/lib/Target/ARM/ARMRegisterInfo.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.h b/llvm/lib/Target/ARM/ARMRegisterInfo.h
index 69f5640dd68..9ef761832c6 100644
--- a/llvm/lib/Target/ARM/ARMRegisterInfo.h
+++ b/llvm/lib/Target/ARM/ARMRegisterInfo.h
@@ -21,10 +21,12 @@
namespace llvm {
class Type;
+class TargetInstrInfo;
struct ARMRegisterInfo : public ARMGenRegisterInfo {
+ const TargetInstrInfo &TII;
- ARMRegisterInfo();
+ ARMRegisterInfo(const TargetInstrInfo &tii);
/// Code Generation virtual methods...
void storeRegToStackSlot(MachineBasicBlock &MBB,
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