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authorEvan Cheng <evan.cheng@apple.com>2007-01-19 19:28:01 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-01-19 19:28:01 +0000
commitbf216c364fc1c30766280826c851149cc5be11a0 (patch)
tree396744e06fb5f1eb72ad3f8f628662ea1ef2d342 /llvm/lib/Target/ARM/ARMRegisterInfo.cpp
parent1199c2d653627931367c9c5d30f4469ecc7ab1c5 (diff)
downloadbcm5719-llvm-bf216c364fc1c30766280826c851149cc5be11a0.tar.gz
bcm5719-llvm-bf216c364fc1c30766280826c851149cc5be11a0.zip
isDarwin -> isTargetDarwin
llvm-svn: 33366
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMRegisterInfo.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
index 5ae482babc8..6419d10dab8 100644
--- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -256,7 +256,7 @@ const unsigned* ARMRegisterInfo::getCalleeSavedRegs() const {
ARM::D11, ARM::D10, ARM::D9, ARM::D8,
0
};
- return STI.isDarwin() ? DarwinCalleeSavedRegs : CalleeSavedRegs;
+ return STI.isTargetDarwin() ? DarwinCalleeSavedRegs : CalleeSavedRegs;
}
const TargetRegisterClass* const *
@@ -807,7 +807,7 @@ static void movePastCSLoadStoreOps(MachineBasicBlock &MBB,
case ARM::R9:
case ARM::R10:
case ARM::R11:
- Category = STI.isDarwin() ? 2 : 1;
+ Category = STI.isTargetDarwin() ? 2 : 1;
break;
case ARM::D8:
case ARM::D9:
@@ -870,7 +870,7 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const {
case ARM::R11:
if (Reg == FramePtr)
FramePtrSpillFI = FI;
- if (STI.isDarwin()) {
+ if (STI.isTargetDarwin()) {
AFI->addGPRCalleeSavedArea2Frame(FI);
GPRCS2Size += 4;
} else {
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