[ARM] GlobalISel: Add FPR reg bank

Add a register bank for floating point values and select simple instructions
using them (add, copies from GPR).

This assumes that the hardware can cope with a single precision add (VADDS)
instruction, so the legalizer will treat G_FADD as legal and the instruction
selector will refuse to select if the hardware doesn't support it. In the future
we'll want to be more careful about this, and legalize to libcalls if we have to
use soft float.

llvm-svn: 294442

1 files changed, 1 insertions, 0 deletions

diff --git a/llvm/lib/Target/ARM/ARMRegisterBanks.td b/llvm/lib/Target/ARM/ARMRegisterBanks.td
index a2b3a7943c1..b8e0347ef62 100644
--- a/llvm/lib/Target/ARM/ARMRegisterBanks.td
+++ b/llvm/lib/Target/ARM/ARMRegisterBanks.td
@@ -11,3 +11,4 @@
 //===----------------------------------------------------------------------===//
 
 def GPRRegBank : RegisterBank<"GPRB", [GPR, GPRwithAPSR]>;
+def FPRRegBank : RegisterBank<"FPRB", [SPR]>;