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| author | Diana Picus <diana.picus@linaro.org> | 2018-01-17 14:14:14 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2018-01-17 14:14:14 +0000 |
| commit | c62a16234b587bdfd934da85ddd2b49ce0584c3a (patch) | |
| tree | 3e0204388cbc2f83ba04d4e5b90c322c56625236 /llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | |
| parent | d5fca554e2384fe99d4cc89829955fa0222d0b5f (diff) | |
| download | bcm5719-llvm-c62a16234b587bdfd934da85ddd2b49ce0584c3a.tar.gz bcm5719-llvm-c62a16234b587bdfd934da85ddd2b49ce0584c3a.zip | |
[ARM GlobalISel] Map G_FPEXT and G_FPTRUNC to FPR
llvm-svn: 322657
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp index 37fb50b13ff..0e6073a5c80 100644 --- a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp @@ -285,6 +285,24 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { &ARM::ValueMappings[ARM::SPR3OpsIdx]}); break; } + case G_FPEXT: { + LLT ToTy = MRI.getType(MI.getOperand(0).getReg()); + LLT FromTy = MRI.getType(MI.getOperand(1).getReg()); + if (ToTy.getSizeInBits() == 64 && FromTy.getSizeInBits() == 32) + OperandsMapping = + getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], + &ARM::ValueMappings[ARM::SPR3OpsIdx]}); + break; + } + case G_FPTRUNC: { + LLT ToTy = MRI.getType(MI.getOperand(0).getReg()); + LLT FromTy = MRI.getType(MI.getOperand(1).getReg()); + if (ToTy.getSizeInBits() == 32 && FromTy.getSizeInBits() == 64) + OperandsMapping = + getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], + &ARM::ValueMappings[ARM::DPR3OpsIdx]}); + break; + } case G_CONSTANT: case G_FRAME_INDEX: case G_GLOBAL_VALUE: |
