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| author | Diana Picus <diana.picus@linaro.org> | 2017-06-07 09:17:41 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-06-07 09:17:41 +0000 |
| commit | 8445858a93734113777a1eb5c34c7b3073ffd6e2 (patch) | |
| tree | 8430b7da62f4b5c6b304ce68d4aa608cc06f413d /llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | |
| parent | 1d38129b92e09b99df20711647e4814cc2e272d7 (diff) | |
| download | bcm5719-llvm-8445858a93734113777a1eb5c34c7b3073ffd6e2.tar.gz bcm5719-llvm-8445858a93734113777a1eb5c34c7b3073ffd6e2.zip | |
[ARM] GlobalISel: Support G_AND
This is identical to the support for the other binary operators:
- widen to s32
- map into GPR
- select ANDrr (via TableGen'erated code)
llvm-svn: 304885
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp index a20997c95cd..ec8ac97ac3a 100644 --- a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp @@ -221,6 +221,7 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { case G_ADD: case G_SUB: case G_MUL: + case G_AND: case G_SDIV: case G_UDIV: case G_SEXT: |
