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| author | Diana Picus <diana.picus@linaro.org> | 2017-04-19 07:29:46 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-04-19 07:29:46 +0000 |
| commit | 49472ff1cfe8ee9dc4832e740d3565ccf8c7af9f (patch) | |
| tree | 38c29ee15b9b9b2141307306a611c2208f00607d /llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | |
| parent | 0f36e68f624f8ebe5fd6297bfd5b19819bf7ab21 (diff) | |
| download | bcm5719-llvm-49472ff1cfe8ee9dc4832e740d3565ccf8c7af9f.tar.gz bcm5719-llvm-49472ff1cfe8ee9dc4832e740d3565ccf8c7af9f.zip | |
[ARM] GlobalISel: Add support for G_MUL
Support G_MUL, very similar to G_ADD and G_SUB. The only difference is
in the instruction selector, where we have to select either MUL or MULv5
depending on the target.
llvm-svn: 300665
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp index dc0866f81df..e47bd3a8963 100644 --- a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp @@ -220,6 +220,7 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { switch (Opc) { case G_ADD: case G_SUB: + case G_MUL: case G_SEXT: case G_ZEXT: case G_GEP: |
