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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-11-08 21:21:00 -0800 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-01-03 16:25:10 -0500 |
| commit | 21309eafdebaa0041a83a026ae011e305b2f52a0 (patch) | |
| tree | 90e6cbd12199a7b12155ca8a6b2a404bc4e4dca6 /llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | |
| parent | 555fc92a85914c2bcccbc01886039284c4f9db57 (diff) | |
| download | bcm5719-llvm-21309eafdebaa0041a83a026ae011e305b2f52a0.tar.gz bcm5719-llvm-21309eafdebaa0041a83a026ae011e305b2f52a0.zip | |
GlobalISel: Add type argument to getRegBankFromRegClass
AMDGPU can't unambiguously go back from the selected instruction
register class to the register bank without knowing if this was used
in a boolean context.
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp index 4dcdb33d308..43c8cd5a89b 100644 --- a/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp +++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp @@ -172,8 +172,9 @@ ARMRegisterBankInfo::ARMRegisterBankInfo(const TargetRegisterInfo &TRI) #endif } -const RegisterBank &ARMRegisterBankInfo::getRegBankFromRegClass( - const TargetRegisterClass &RC) const { +const RegisterBank & +ARMRegisterBankInfo::getRegBankFromRegClass(const TargetRegisterClass &RC, + LLT) const { using namespace ARM; switch (RC.getID()) { |
