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author | Jim Grosbach <grosbach@apple.com> | 2010-12-06 23:57:07 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2010-12-06 23:57:07 +0000 |
commit | 9e1994698d3da8cecec5a6cc5e95b18db913ef4b (patch) | |
tree | 20a23f5e416ff59c063b01b2934dda18fa620e1b /llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | |
parent | f6c7308bb1e04a08e711abec9ee3afb1a7dc4aab (diff) | |
download | bcm5719-llvm-9e1994698d3da8cecec5a6cc5e95b18db913ef4b.tar.gz bcm5719-llvm-9e1994698d3da8cecec5a6cc5e95b18db913ef4b.zip |
Add fixup for Thumb1 BL/BLX instructions.
llvm-svn: 121072
Diffstat (limited to 'llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp index bdac5adf4cd..b8939a1531c 100644 --- a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -50,6 +50,7 @@ public: { "fixup_arm_pcrel_10", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_adr_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_branch", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_movt_hi16", 0, 16, 0 }, { "fixup_arm_movw_lo16", 0, 16, 0 }, }; @@ -81,6 +82,11 @@ public: unsigned &Reg, unsigned &Imm, SmallVectorImpl<MCFixup> &Fixups) const; + /// getThumbBLTargetOpValue - Return encoding info for Thumb immediate + /// branch target. + uint32_t getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl<MCFixup> &Fixups) const; + /// getBranchTargetOpValue - Return encoding info for 24-bit immediate /// branch target. uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, @@ -395,6 +401,24 @@ EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg, return isAdd; } +/// getThumbBLTargetOpValue - Return encoding info for immediate +/// branch target. +uint32_t ARMMCCodeEmitter:: +getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx, + SmallVectorImpl<MCFixup> &Fixups) const { + const MCOperand &MO = MI.getOperand(OpIdx); + + // If the destination is an immediate, we have nothing to do. + if (MO.isImm()) return MO.getImm(); + assert (MO.isExpr() && "Unexpected branch target type!"); + const MCExpr *Expr = MO.getExpr(); + MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_thumb_bl); + Fixups.push_back(MCFixup::Create(0, Expr, Kind)); + + // All of the information is in the fixup. + return 0; +} + /// getBranchTargetOpValue - Return encoding info for 24-bit immediate /// branch target. uint32_t ARMMCCodeEmitter:: |