diff options
| author | Owen Anderson <resistor@mac.com> | 2011-07-13 23:22:26 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-07-13 23:22:26 +0000 |
| commit | 651b230ca04622b64e83eb5f3eee8c9587f1f057 (patch) | |
| tree | f595816e762eed618a899d589c7f6094f5bc6c00 /llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | |
| parent | 97ef3fc5bf1f243e1345d2ff83d4c243bd689632 (diff) | |
| download | bcm5719-llvm-651b230ca04622b64e83eb5f3eee8c9587f1f057.tar.gz bcm5719-llvm-651b230ca04622b64e83eb5f3eee8c9587f1f057.zip | |
Add a target-indepedent entry to MCInstrDesc to describe the encoded size of an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits.
llvm-svn: 135106
Diffstat (limited to 'llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp index df3a14f3a8e..aea1d1d145a 100644 --- a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -1296,13 +1296,13 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, uint64_t TSFlags = Desc.TSFlags; if ((TSFlags & ARMII::FormMask) == ARMII::Pseudo) return; + int Size; - // Basic size info comes from the TSFlags field. - switch ((TSFlags & ARMII::SizeMask) >> ARMII::SizeShift) { - default: llvm_unreachable("Unexpected instruction size!"); - case ARMII::Size2Bytes: Size = 2; break; - case ARMII::Size4Bytes: Size = 4; break; - } + if (Desc.getSize() == 2 || Desc.getSize() == 4) + Size = Desc.getSize(); + else + llvm_unreachable("Unexpected instruction size!"); + uint32_t Binary = getBinaryCodeForInstr(MI, Fixups); // Thumb 32-bit wide instructions need to emit the high order halfword // first. |
