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| author | Owen Anderson <resistor@mac.com> | 2010-12-08 00:18:36 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2010-12-08 00:18:36 +0000 |
| commit | 0f7142d80802844ca85cb41a0df32017dbf7e0da (patch) | |
| tree | 8194dd5db01021a4033fd35af1ca5c57c92e02c8 /llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | |
| parent | 8811c3a72e98cd05232100603b25b8027be4200a (diff) | |
| download | bcm5719-llvm-0f7142d80802844ca85cb41a0df32017dbf7e0da.tar.gz bcm5719-llvm-0f7142d80802844ca85cb41a0df32017dbf7e0da.zip | |
VLDR fixups need special handling under Thumb. While the encoding is the same,
the order of the bytes in the data stream is flipped around.
llvm-svn: 121215
Diffstat (limited to 'llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp index 229e00e65d4..ba1f6d30ca2 100644 --- a/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -48,6 +48,7 @@ public: // name off bits flags { "fixup_arm_ldst_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_pcrel_10", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_t2_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_adr_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_branch", 1, 24, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, @@ -737,7 +738,12 @@ getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx, assert(MO.isExpr() && "Unexpected machine operand type!"); const MCExpr *Expr = MO.getExpr(); - MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_10); + MCFixupKind Kind; + const ARMSubtarget &Subtarget = TM.getSubtarget<ARMSubtarget>(); + if (Subtarget.isThumb2()) + Kind = MCFixupKind(ARM::fixup_t2_pcrel_10); + else + Kind = MCFixupKind(ARM::fixup_arm_pcrel_10); Fixups.push_back(MCFixup::Create(0, Expr, Kind)); ++MCNumCPRelocations; |
