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| author | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-09-04 17:41:16 +0000 |
|---|---|---|
| committer | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-09-04 17:41:16 +0000 |
| commit | d7e8d9260687c1461c936bf4a5439645662c931e (patch) | |
| tree | 4f518a76a943320942462c3ff80b448d77f50318 /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | d9063c46f59f4bec47bcbeddca8ca2f789348c03 (diff) | |
| download | bcm5719-llvm-d7e8d9260687c1461c936bf4a5439645662c931e.tar.gz bcm5719-llvm-d7e8d9260687c1461c936bf4a5439645662c931e.zip | |
Swift: Only build vldm/vstm with q register aligned register lists
Unaligned vldm/vstm need more uops and therefore are slower in general on swift.
radar://14522102
llvm-svn: 189961
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 1803a8a5887..237adb9b22e 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -489,7 +489,10 @@ ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, if (Reg != ARM::SP && NewOffset == Offset + (int)Size && ((isNotVFP && RegNum > PRegNum) || - ((Count < Limit) && RegNum == PRegNum+1))) { + ((Count < Limit) && RegNum == PRegNum+1)) && + // On Swift we don't want vldm/vstm to start with a odd register num + // because Q register unaligned vldm/vstm need more uops. + (!STI->isSwift() || isNotVFP || Count != 1 || !(PRegNum & 0x1))) { Offset += Size; PRegNum = RegNum; ++Count; |
