summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@gmail.com>2012-04-20 07:30:17 +0000
committerCraig Topper <craig.topper@gmail.com>2012-04-20 07:30:17 +0000
commitc7242e054ddba4ad0514cb632903bfa0aa1461f5 (patch)
tree3a03dffc586235440d90d26866c104b586b30910 /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
parent61e582f6bccfffdcd3ba93a5bf5a7e1c5b882a6d (diff)
downloadbcm5719-llvm-c7242e054ddba4ad0514cb632903bfa0aa1461f5.tar.gz
bcm5719-llvm-c7242e054ddba4ad0514cb632903bfa0aa1461f5.zip
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
llvm-svn: 155188
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 9ef2ace29cf..87e68641085 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -1326,7 +1326,7 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
// First advance to the instruction just before the start of the chain.
AdvanceRS(MBB, MemOps);
// Find a scratch register.
- unsigned Scratch = RS->FindUnusedReg(ARM::GPRRegisterClass);
+ unsigned Scratch = RS->FindUnusedReg(&ARM::GPRRegClass);
// Process the load / store instructions.
RS->forward(prior(MBBI));
OpenPOWER on IntegriCloud