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| author | Bob Wilson <bob.wilson@apple.com> | 2010-09-10 05:15:04 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-09-10 05:15:04 +0000 |
| commit | 8617234658019c187e3ad80303a8fbcb4e332c46 (patch) | |
| tree | 78afefb0c3e59d8fc3908764632032f0f66c7fd0 /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | 428a9a58facb5aafed162386944f91afa17a1023 (diff) | |
| download | bcm5719-llvm-8617234658019c187e3ad80303a8fbcb4e332c46.tar.gz bcm5719-llvm-8617234658019c187e3ad80303a8fbcb4e332c46.zip | |
Fix merging base-updates for VLDM/VSTM: Before I switched these instructions
to use AddrMode4, there was a count of the registers stored in one of the
operands. I changed that to just count the operands but forgot to adjust for
the size of D registers. This was noticed by Evan as a performance problem
but it is a potential correctness bug as well, since it is possible that this
could merge a base update with a non-matching immediate.
llvm-svn: 113576
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index d1acacfb1d0..2b7645a4211 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -458,9 +458,10 @@ static inline unsigned getLSMultipleTransferSize(MachineInstr *MI) { case ARM::t2STM: case ARM::VLDMS: case ARM::VSTMS: + return (MI->getNumOperands() - 4) * 4; case ARM::VLDMD: case ARM::VSTMD: - return (MI->getNumOperands() - 4) * 4; + return (MI->getNumOperands() - 4) * 8; } } |
