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| author | Jim Grosbach <grosbach@apple.com> | 2010-10-27 00:38:16 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-27 00:38:16 +0000 |
| commit | 2577b2e8b1266f9f3b8c4b754d30012e60c65832 (patch) | |
| tree | 79c132727830e3e1f360a0297b86b3e49997ca41 /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | e9b429e96fcf81a5abbce23c6b71043c40f98bc5 (diff) | |
| download | bcm5719-llvm-2577b2e8b1266f9f3b8c4b754d30012e60c65832.tar.gz bcm5719-llvm-2577b2e8b1266f9f3b8c4b754d30012e60c65832.zip | |
One more spot where the new arm mode LDR instruction representation
doesn't need the additional addrmode2 register operand. Missed it the first
time around.
llvm-svn: 117421
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 85a0981ec6c..3715ec002c5 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -860,7 +860,9 @@ static void InsertLDR_STR(MachineBasicBlock &MBB, ARMCC::CondCodes Pred, unsigned PredReg, const TargetInstrInfo *TII, bool isT2) { int Offset = OffImm; - if (!isT2) { + // FIXME: This fancy offset encoding stuff goes away when we're done + // removing addrmode2. + if (!isT2 && !isDef) { if (OffImm < 0) Offset = ARM_AM::getAM2Opc(ARM_AM::sub, -OffImm, ARM_AM::no_shift); else @@ -871,8 +873,6 @@ static void InsertLDR_STR(MachineBasicBlock &MBB, TII->get(NewOpc)) .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill)) .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); - if (!isT2) - MIB.addReg(OffReg, getKillRegState(OffKill)|getUndefRegState(OffUndef)); MIB.addImm(Offset).addImm(Pred).addReg(PredReg); } else { MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MBBI->getDebugLoc(), |
