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| author | Evan Cheng <evan.cheng@apple.com> | 2010-02-12 22:17:21 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-02-12 22:17:21 +0000 |
| commit | 439bda9d3f36ec512c655eefb562f2147563dabd (patch) | |
| tree | 1e3c289ee6faf32e2f0b183a2a3f0a1967b9a91c /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | cb39340b819729c2a74171c9371fb45bafb5400d (diff) | |
| download | bcm5719-llvm-439bda9d3f36ec512c655eefb562f2147563dabd.tar.gz bcm5719-llvm-439bda9d3f36ec512c655eefb562f2147563dabd.zip | |
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.
llvm-svn: 96023
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index b78b95b22eb..4e2d1815dc6 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -350,7 +350,8 @@ ARMLoadStoreOpt::MergeLDR_STR(MachineBasicBlock &MBB, unsigned SIndex, : ARMRegisterInfo::getRegisterNumbering(Reg); // AM4 - register numbers in ascending order. // AM5 - consecutive register numbers in ascending order. - if (NewOffset == Offset + (int)Size && + if (Reg != ARM::SP && + NewOffset == Offset + (int)Size && ((isAM4 && RegNum > PRegNum) || RegNum == PRegNum+1)) { Offset += Size; PRegNum = RegNum; |
