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author | Diana Picus <diana.picus@linaro.org> | 2017-06-07 09:17:41 +0000 |
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committer | Diana Picus <diana.picus@linaro.org> | 2017-06-07 09:17:41 +0000 |
commit | 8445858a93734113777a1eb5c34c7b3073ffd6e2 (patch) | |
tree | 8430b7da62f4b5c6b304ce68d4aa608cc06f413d /llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | |
parent | 1d38129b92e09b99df20711647e4814cc2e272d7 (diff) | |
download | bcm5719-llvm-8445858a93734113777a1eb5c34c7b3073ffd6e2.tar.gz bcm5719-llvm-8445858a93734113777a1eb5c34c7b3073ffd6e2.zip |
[ARM] GlobalISel: Support G_AND
This is identical to the support for the other binary operators:
- widen to s32
- map into GPR
- select ANDrr (via TableGen'erated code)
llvm-svn: 304885
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLegalizerInfo.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp index 5bf6c7aed6b..b645b83844c 100644 --- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp +++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp @@ -45,7 +45,7 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) { setAction({Op, 1, p0}, Legal); } - for (unsigned Op : {G_ADD, G_SUB, G_MUL}) { + for (unsigned Op : {G_ADD, G_SUB, G_MUL, G_AND}) { for (auto Ty : {s1, s8, s16}) setAction({Op, Ty}, WidenScalar); setAction({Op, s32}, Legal); |