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authorDiana Picus <diana.picus@linaro.org>2017-05-17 12:42:52 +0000
committerDiana Picus <diana.picus@linaro.org>2017-05-17 12:42:52 +0000
commiteafa4aa91023c48c5742b82f8d92841f78c0c4cc (patch)
tree4f8fedb68b64ff5beadac03dfbd67e62be953159 /llvm/lib/Target/ARM/ARMInstructionSelector.cpp
parentfed9f09f481865376db7216cd7716252789f6a5e (diff)
downloadbcm5719-llvm-eafa4aa91023c48c5742b82f8d92841f78c0c4cc.tar.gz
bcm5719-llvm-eafa4aa91023c48c5742b82f8d92841f78c0c4cc.zip
Reland r303247: [ARM] GlobalISel: Remove dead instruction selection code
It only failed on llvm-clang-x86_64-expensive-checks-win, probably because the TableGen stuff hasn't been regenerated. Requires a clean build. llvm-svn: 303252
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstructionSelector.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMInstructionSelector.cpp15
1 files changed, 0 insertions, 15 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
index 8c680cdf9b4..b1f059835ff 100644
--- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
+++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
@@ -345,25 +345,10 @@ bool ARMInstructionSelector::select(MachineInstr &I) const {
I.setDesc(TII.get(COPY));
return selectCopy(I, TII, MRI, TRI, RBI);
}
- case G_ADD:
case G_GEP:
I.setDesc(TII.get(ARM::ADDrr));
MIB.add(predOps(ARMCC::AL)).add(condCodeOp());
break;
- case G_SUB:
- I.setDesc(TII.get(ARM::SUBrr));
- MIB.add(predOps(ARMCC::AL)).add(condCodeOp());
- break;
- case G_MUL:
- if (TII.getSubtarget().hasV6Ops()) {
- I.setDesc(TII.get(ARM::MUL));
- } else {
- assert(TII.getSubtarget().useMulOps() && "Unsupported target");
- I.setDesc(TII.get(ARM::MULv5));
- MIB->getOperand(0).setIsEarlyClobber(true);
- }
- MIB.add(predOps(ARMCC::AL)).add(condCodeOp());
- break;
case G_FRAME_INDEX:
// Add 0 to the given frame index and hope it will eventually be folded into
// the user(s).
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