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authorEvan Cheng <evan.cheng@apple.com>2007-01-27 00:07:15 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-01-27 00:07:15 +0000
commitf40b9006a850f77a3d495ffe6054c5dcd979ec88 (patch)
treeead46ff05ed03351ed3be73e32639f4857d90a00 /llvm/lib/Target/ARM/ARMInstrThumb.td
parent9f82ccb01ff0197f86877c748fbfc48758acf35f (diff)
downloadbcm5719-llvm-f40b9006a850f77a3d495ffe6054c5dcd979ec88.tar.gz
bcm5719-llvm-f40b9006a850f77a3d495ffe6054c5dcd979ec88.zip
Thumb add / sub with carry.
llvm-svn: 33562
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrThumb.td')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb.td18
1 files changed, 17 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 01aefb54cc8..52b8939e24c 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -266,6 +266,16 @@ def tPUSH : TI<(ops reglist:$src1, variable_ops),
// Arithmetic Instructions.
//
+// Add with carry
+def tADC : TIt<(ops GPR:$dst, GPR:$lhs, GPR:$rhs),
+ "adc $dst, $rhs",
+ [(set GPR:$dst, (adde GPR:$lhs, GPR:$rhs))]>;
+
+def tADDS : TI<(ops GPR:$dst, GPR:$lhs, GPR:$rhs),
+ "adds $dst, $lhs, $rhs",
+ [(set GPR:$dst, (addc GPR:$lhs, GPR:$rhs))]>;
+
+
def tADDi3 : TI<(ops GPR:$dst, GPR:$lhs, i32imm:$rhs),
"add $dst, $lhs, $rhs",
[(set GPR:$dst, (add GPR:$lhs, imm0_7:$rhs))]>;
@@ -288,7 +298,6 @@ def tADDrSPi : TI<(ops GPR:$dst, GPR:$sp, i32imm:$rhs),
def tADDspi : TIt<(ops GPR:$dst, GPR:$lhs, i32imm:$rhs),
"add $dst, $rhs * 4", []>;
-
def tAND : TIt<(ops GPR:$dst, GPR:$lhs, GPR:$rhs),
"and $dst, $rhs",
[(set GPR:$dst, (and GPR:$lhs, GPR:$rhs))]>;
@@ -395,10 +404,17 @@ def tROR : TIt<(ops GPR:$dst, GPR:$lhs, GPR:$rhs),
"ror $dst, $rhs",
[(set GPR:$dst, (rotr GPR:$lhs, GPR:$rhs))]>;
+
+// Subtract with carry
def tSBC : TIt<(ops GPR:$dst, GPR:$lhs, GPR:$rhs),
"sbc $dst, $rhs",
[(set GPR:$dst, (sube GPR:$lhs, GPR:$rhs))]>;
+def tSUBS : TI<(ops GPR:$dst, GPR:$lhs, GPR:$rhs),
+ "subs $dst, $lhs, $rhs",
+ [(set GPR:$dst, (subc GPR:$lhs, GPR:$rhs))]>;
+
+
// TODO: A7-96: STMIA - store multiple.
def tSUBi3 : TI<(ops GPR:$dst, GPR:$lhs, i32imm:$rhs),
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