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authorJames Molloy <james.molloy@arm.com>2012-02-09 10:56:31 +0000
committerJames Molloy <james.molloy@arm.com>2012-02-09 10:56:31 +0000
commitd9ba4fd48f4f801b2f1f8e8e7ef21409d95cf648 (patch)
treec02c0353336fcfd417d7968efa396a95b1725391 /llvm/lib/Target/ARM/ARMInstrThumb.td
parent7345626a5b86bc6c7ff2f86050ad255b16283f40 (diff)
downloadbcm5719-llvm-d9ba4fd48f4f801b2f1f8e8e7ef21409d95cf648.tar.gz
bcm5719-llvm-d9ba4fd48f4f801b2f1f8e8e7ef21409d95cf648.zip
Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
llvm-svn: 150169
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrThumb.td')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb.td1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 30aa424343c..9bbf8e60320 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -387,6 +387,7 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
bits<4> Rm;
let Inst{6-3} = Rm;
let Inst{2-0} = 0b000;
+ let Unpredictable{2-0} = 0b111;
}
}
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