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author | Evan Cheng <evan.cheng@apple.com> | 2008-11-06 03:35:07 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-11-06 03:35:07 +0000 |
commit | 36ae40342f68e27f644488a067a985318da4b218 (patch) | |
tree | 0300694c328688b4e74a24d91343f2aaf3fc7a07 /llvm/lib/Target/ARM/ARMInstrFormats.td | |
parent | 43de293d7523b2664394a331629877fe4a0b28aa (diff) | |
download | bcm5719-llvm-36ae40342f68e27f644488a067a985318da4b218.tar.gz bcm5719-llvm-36ae40342f68e27f644488a067a985318da4b218.zip |
Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
llvm-svn: 58793
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrFormats.td')
-rw-r--r-- | llvm/lib/Target/ARM/ARMInstrFormats.td | 47 |
1 files changed, 27 insertions, 20 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index 3ac9b1e79ba..2a30e777ee0 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -21,26 +21,22 @@ class Format<bits<5> val> { def Pseudo : Format<1>; def MulFrm : Format<2>; -def MulSMLAW : Format<3>; -def MulSMULW : Format<4>; -def MulSMLA : Format<5>; -def MulSMUL : Format<6>; -def Branch : Format<7>; -def BranchMisc : Format<8>; - -def DPFrm : Format<9>; -def DPSoRegFrm : Format<10>; - -def LdFrm : Format<11>; -def StFrm : Format<12>; -def LdMiscFrm : Format<13>; -def StMiscFrm : Format<14>; -def LdMulFrm : Format<15>; -def StMulFrm : Format<16>; - -def ArithMisc : Format<17>; -def ThumbFrm : Format<18>; -def VFPFrm : Format<19>; +def Branch : Format<3>; +def BranchMisc : Format<4>; + +def DPFrm : Format<5>; +def DPSoRegFrm : Format<6>; + +def LdFrm : Format<7>; +def StFrm : Format<8>; +def LdMiscFrm : Format<9>; +def StMiscFrm : Format<10>; +def LdMulFrm : Format<11>; +def StMulFrm : Format<12>; + +def ArithMisc : Format<13>; +def ThumbFrm : Format<14>; +def VFPFrm : Format<15>; // Misc flag for data processing instructions that indicates whether // the instruction has a Rn register operand. @@ -704,6 +700,17 @@ class AMul2I<bits<7> mulopc, dag oops, dag iops, string opc, let Inst{27-21} = mulopc; } +// SMUL<x><y> / SMULW<y> / SMLA<x><y> / SMLAW<x><y> +class AMulxyI<bits<7> mulopc, dag oops, dag iops, string opc, + string asm, list<dag> pattern> + : I<0, oops, iops, AddrModeNone, Size4Bytes, IndexModeNone, MulFrm, opc, + asm,"",pattern> { + let Inst{4} = 0; + let Inst{7} = 1; + let Inst{20} = 0; + let Inst{27-21} = mulopc; +} + //===----------------------------------------------------------------------===// // ARMPat - Same as Pat<>, but requires that the compiler be in ARM mode. |