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authorRafael Espindola <rafael.espindola@gmail.com>2006-08-17 17:09:40 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2006-08-17 17:09:40 +0000
commitc3ed77e1b91354a0e54936f2a095d6186bff7133 (patch)
tree5b8b95e01a03644f9a31785005b0e3182960a412 /llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
parent1c3210d08dbb73cf94e9db45c2b8de56208bc63e (diff)
downloadbcm5719-llvm-c3ed77e1b91354a0e54936f2a095d6186bff7133.tar.gz
bcm5719-llvm-c3ed77e1b91354a0e54936f2a095d6186bff7133.zip
add a "load effective address"
llvm-svn: 29748
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 80aaae54dab..56d61165c3c 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -358,6 +358,11 @@ static bool isInt12Immediate(SDOperand Op, short &Imm) {
//register plus/minus 12 bit offset
bool ARMDAGToDAGISel::SelectAddrRegImm(SDOperand N, SDOperand &Offset,
SDOperand &Base) {
+ if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(N)) {
+ Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
+ Offset = CurDAG->getTargetConstant(0, MVT::i32);
+ return true;
+ }
if (N.getOpcode() == ISD::ADD) {
short imm = 0;
if (isInt12Immediate(N.getOperand(1), imm)) {
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