summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2010-05-17 19:51:20 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-17 19:51:20 +0000
commit3d98b996ff5ec945d60634fac6995bce448ea3f5 (patch)
tree298559e593004f35fe918ac9dd9f2c03e3bcf847 /llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
parentc4c574bd2e4a43c79139b442bcc03685cd722937 (diff)
downloadbcm5719-llvm-3d98b996ff5ec945d60634fac6995bce448ea3f5.tar.gz
bcm5719-llvm-3d98b996ff5ec945d60634fac6995bce448ea3f5.zip
Turn on -neon-reg-sequence by default.
Using NEON load / store multiple instructions will no longer create gobs of vmov of D registers! llvm-svn: 103960
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index ecc647f8ac1..193b246b865 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -37,7 +37,8 @@ using namespace llvm;
static cl::opt<bool>
UseRegSeq("neon-reg-sequence", cl::Hidden,
- cl::desc("Use reg_sequence to model ld / st of multiple neon regs"));
+ cl::desc("Use reg_sequence to model ld / st of multiple neon regs"),
+ cl::init(true));
//===--------------------------------------------------------------------===//
/// ARMDAGToDAGISel - ARM specific code to select ARM machine
OpenPOWER on IntegriCloud