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| author | Sanjay Patel <spatel@rotateright.com> | 2016-09-14 16:37:15 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-09-14 16:37:15 +0000 |
| commit | 1ed771f5d7e68c868807f3b59e18f36dd50b0fbf (patch) | |
| tree | 34e0f93dcb6c1ef93d20f2b037cb470f8634215c /llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | |
| parent | d10a5ea19ece4b5d77fb548c04b782966de873a7 (diff) | |
| download | bcm5719-llvm-1ed771f5d7e68c868807f3b59e18f36dd50b0fbf.tar.gz bcm5719-llvm-1ed771f5d7e68c868807f3b59e18f36dd50b0fbf.zip | |
getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI
llvm-svn: 281495
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index 30586aa2539..cb01b6315ff 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -2142,7 +2142,7 @@ void ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating, unsigned Alignment = 0; if (NumVecs != 3) { Alignment = cast<ConstantSDNode>(Align)->getZExtValue(); - unsigned NumBytes = NumVecs * VT.getVectorElementType().getSizeInBits()/8; + unsigned NumBytes = NumVecs * VT.getScalarSizeInBits() / 8; if (Alignment > NumBytes) Alignment = NumBytes; if (Alignment < 8 && Alignment < NumBytes) @@ -2257,7 +2257,7 @@ void ARMDAGToDAGISel::SelectVLDDup(SDNode *N, bool isUpdating, unsigned NumVecs, unsigned Alignment = 0; if (NumVecs != 3) { Alignment = cast<ConstantSDNode>(Align)->getZExtValue(); - unsigned NumBytes = NumVecs * VT.getVectorElementType().getSizeInBits()/8; + unsigned NumBytes = NumVecs * VT.getScalarSizeInBits() / 8; if (Alignment > NumBytes) Alignment = NumBytes; if (Alignment < 8 && Alignment < NumBytes) |
