diff options
author | Andrew Trick <atrick@apple.com> | 2011-08-25 17:50:53 +0000 |
---|---|---|
committer | Andrew Trick <atrick@apple.com> | 2011-08-25 17:50:53 +0000 |
commit | 6446bf780a0bed03990151c6fcbc208aeb0846c1 (patch) | |
tree | a8024db43e10364ed001971e2c970c9b54b7ecb7 /llvm/lib/Target/ARM/ARMFrameLowering.cpp | |
parent | 73d5f67f5a080ba96262d9e6eef4158005a1273b (diff) | |
download | bcm5719-llvm-6446bf780a0bed03990151c6fcbc208aeb0846c1.tar.gz bcm5719-llvm-6446bf780a0bed03990151c6fcbc208aeb0846c1.zip |
ARM fix for missing implicit operands on ldmia_ret.
rdar://10005094: miscompile of 176.gcc
llvm-svn: 138568
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFrameLowering.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMFrameLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp index 85c284f02ab..8fe3f39da85 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -646,8 +646,10 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB, .addReg(ARM::SP)); for (unsigned i = 0, e = Regs.size(); i < e; ++i) MIB.addReg(Regs[i], getDefRegState(true)); - if (DeleteRet) + if (DeleteRet) { + MIB->copyImplicitOps(&*MI); MI->eraseFromParent(); + } MI = MIB; } else if (Regs.size() == 1) { // If we adjusted the reg to PC from LR above, switch it back here. We |