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authorEli Friedman <efriedma@codeaurora.org>2018-08-08 20:03:10 +0000
committerEli Friedman <efriedma@codeaurora.org>2018-08-08 20:03:10 +0000
commit5b45a390568c5245ab3b1df5be68536c785ee3ae (patch)
treeda23c168ba9e0a2a7b4fb8db2c652f086c2bbb1e /llvm/lib/Target/ARM/ARMFrameLowering.cpp
parent0a4f6be4434c9c5d03d9e7ed46ed21af1fdd6a1a (diff)
downloadbcm5719-llvm-5b45a390568c5245ab3b1df5be68536c785ee3ae.tar.gz
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[ARM] Avoid spilling lr with Thumb1 tail calls.
Normally, if any registers are spilled, we prefer to spill lr on Thumb1 so we can fold the "bx lr" into the "pop". However, if there are tail calls involved, restoring lr is expensive, so skip the optimization in that case. The spill of r7 in the new test also isn't necessary, but that's mostly orthogonal to this patch. (It's the same code in ARMFrameLowering, but it's not related to tail calls.) Differential Revision: https://reviews.llvm.org/D49459 llvm-svn: 339283
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFrameLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMFrameLowering.cpp9
1 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index a8c75702d7b..40de21eb5cd 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -1920,9 +1920,13 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
<< "\n");
}
+ // Avoid spilling LR in Thumb1 if there's a tail call: it's expensive to
+ // restore LR in that case.
+ bool ExpensiveLRRestore = AFI->isThumb1OnlyFunction() && MFI.hasTailCall();
+
// If LR is not spilled, but at least one of R4, R5, R6, and R7 is spilled.
// Spill LR as well so we can fold BX_RET to the registers restore (LDM).
- if (!LRSpilled && CS1Spilled) {
+ if (!LRSpilled && CS1Spilled && !ExpensiveLRRestore) {
SavedRegs.set(ARM::LR);
NumGPRSpills++;
SmallVectorImpl<unsigned>::iterator LRPos;
@@ -1948,7 +1952,8 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
// Windows on ARM, accept R11 (frame pointer)
if (!AFI->isThumbFunction() ||
(STI.isTargetWindows() && Reg == ARM::R11) ||
- isARMLowRegister(Reg) || Reg == ARM::LR) {
+ isARMLowRegister(Reg) ||
+ (Reg == ARM::LR && !ExpensiveLRRestore)) {
SavedRegs.set(Reg);
LLVM_DEBUG(dbgs() << "Spilling " << printReg(Reg, TRI)
<< " to make up alignment\n");
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