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| author | Douglas Yung <douglas.yung@sony.com> | 2019-08-02 22:11:49 +0000 |
|---|---|---|
| committer | Douglas Yung <douglas.yung@sony.com> | 2019-08-02 22:11:49 +0000 |
| commit | 42618b270d32d6cfbe539cc0c534eb6a9fa6b36b (patch) | |
| tree | e254b4e6f88be8788d3bd7395f3898d330008c18 /llvm/lib/Target/ARM/ARMFrameLowering.cpp | |
| parent | df1b00a7cb1640c9d4bcb8456d07268266db1175 (diff) | |
| download | bcm5719-llvm-42618b270d32d6cfbe539cc0c534eb6a9fa6b36b.tar.gz bcm5719-llvm-42618b270d32d6cfbe539cc0c534eb6a9fa6b36b.zip | |
Revert Fix and test inter-procedural register allocation for ARM
This reverts r367669 (git commit f6b00c279a5587a25876752a6ecd8da0bed959dc)
This was breaking a build bot http://lab.llvm.org:8011/builders/netbsd-amd64/builds/21233
llvm-svn: 367731
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMFrameLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp index d2a5111a4de..7ae0c6ab3cf 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -2080,8 +2080,9 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF, ExtraCSSpill = true; } } - if (!ExtraCSSpill && RS) { + if (!ExtraCSSpill) { // Reserve a slot closest to SP or frame pointer. + assert(RS && "Register scavenging not provided"); LLVM_DEBUG(dbgs() << "Reserving emergency spill slot\n"); const TargetRegisterClass &RC = ARM::GPRRegClass; unsigned Size = TRI->getSpillSize(RC); |
