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authorEric Christopher <echristo@apple.com>2010-09-18 01:59:37 +0000
committerEric Christopher <echristo@apple.com>2010-09-18 01:59:37 +0000
commitaef6499bf13357f85ff0321eb779207d8d564ed8 (patch)
tree361446ee1c75c48530684b2469bd9a0066b9c412 /llvm/lib/Target/ARM/ARMFastISel.cpp
parenteda7e545e62aceec5e4f1a643276a9ba5ccdf775 (diff)
downloadbcm5719-llvm-aef6499bf13357f85ff0321eb779207d8d564ed8.tar.gz
bcm5719-llvm-aef6499bf13357f85ff0321eb779207d8d564ed8.zip
Add addrmode5 fp load support. Swap float/thumb operand adding to handle
thumb with floating point. llvm-svn: 114256
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp26
1 files changed, 21 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 45279cc9376..5701542d8bc 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -555,6 +555,7 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg,
assert(VT.isSimple() && "Non-simple types are invalid here!");
unsigned Opc;
+ bool isFloat = false;
switch (VT.getSimpleVT().SimpleTy) {
default:
assert(false && "Trying to emit for an unhandled type!");
@@ -570,13 +571,27 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg,
case MVT::i32:
Opc = isThumb ? ARM::tLDR : ARM::LDR;
break;
+ case MVT::f32:
+ Opc = ARM::VLDRS;
+ isFloat = true;
+ break;
+ case MVT::f64:
+ Opc = ARM::VLDRD;
+ isFloat = true;
+ break;
}
ResultReg = createResultReg(TLI.getRegClassFor(VT));
// TODO: Fix the Addressing modes so that these can share some code.
// Since this is a Thumb1 load this will work in Thumb1 or 2 mode.
- if (isThumb)
+ // The thumb addressing mode has operands swapped from the arm addressing
+ // mode, the floating point one only has two operands.
+ if (isFloat)
+ AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+ TII.get(Opc), ResultReg)
+ .addReg(Reg).addImm(Offset));
+ else if (isThumb)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(Opc), ResultReg)
.addReg(Reg).addImm(Offset).addReg(0));
@@ -657,14 +672,15 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg,
// The thumb addressing mode has operands swapped from the arm addressing
// mode, the floating point one only has two operands.
- if (isThumb)
+ if (isFloat)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)
- .addReg(DstReg).addImm(Offset).addReg(0));
- else if (isFloat)
+ .addReg(DstReg).addImm(Offset));
+ else if (isThumb)
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)
- .addReg(DstReg).addImm(Offset));
+ .addReg(DstReg).addImm(Offset).addReg(0));
+
else
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(StrOpc), SrcReg)
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