summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMFastISel.cpp
diff options
context:
space:
mode:
authorEric Christopher <echristo@apple.com>2010-08-19 15:35:27 +0000
committerEric Christopher <echristo@apple.com>2010-08-19 15:35:27 +0000
commita5d60c62b144ee9b186025950fee85722a604b5f (patch)
treede3c4f214c66aac2aa68e51fe8d4c024b6059dfc /llvm/lib/Target/ARM/ARMFastISel.cpp
parent448886d5dfb8df5c1a851ba1b9f25e9eab4be56d (diff)
downloadbcm5719-llvm-a5d60c62b144ee9b186025950fee85722a604b5f.tar.gz
bcm5719-llvm-a5d60c62b144ee9b186025950fee85722a604b5f.zip
Silence warning.
llvm-svn: 111518
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 211e3197286..6dbf0fc98ba 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -137,7 +137,7 @@ ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) {
// Do we optionally set a predicate? Preds is size > 0 iff the predicate
// defines CPSR. All other OptionalDefines in ARM are the CCR register.
- bool CPSR;
+ bool CPSR = false;
if (DefinesOptionalPredicate(MI, &CPSR)) {
if (CPSR)
AddDefaultT1CC(MIB);
OpenPOWER on IntegriCloud