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authorEric Christopher <echristo@apple.com>2010-09-02 01:39:14 +0000
committerEric Christopher <echristo@apple.com>2010-09-02 01:39:14 +0000
commit6a0333c1ed2dc02efd423e6780e1fd7187ec25c7 (patch)
treefdc213e386bbbca30cb47c848ea23629c1170269 /llvm/lib/Target/ARM/ARMFastISel.cpp
parentcbe6b0b8469062cbfabd2e8e18433d490897d689 (diff)
downloadbcm5719-llvm-6a0333c1ed2dc02efd423e6780e1fd7187ec25c7.tar.gz
bcm5719-llvm-6a0333c1ed2dc02efd423e6780e1fd7187ec25c7.zip
One definition of isThumb is plenty, thanks.
llvm-svn: 112793
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp13
1 files changed, 6 insertions, 7 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 02c433b0185..64ab2467d82 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -59,6 +59,9 @@ class ARMFastISel : public FastISel {
const TargetLowering &TLI;
const ARMFunctionInfo *AFI;
+ // Convenience variable to avoid checking all the time.
+ bool isThumb;
+
public:
explicit ARMFastISel(FunctionLoweringInfo &funcInfo)
: FastISel(funcInfo),
@@ -67,6 +70,7 @@ class ARMFastISel : public FastISel {
TLI(*TM.getTargetLowering()) {
Subtarget = &TM.getSubtarget<ARMSubtarget>();
AFI = funcInfo.MF->getInfo<ARMFunctionInfo>();
+ isThumb = AFI->isThumbFunction();
}
// Code from FastISel.cpp.
@@ -395,7 +399,7 @@ bool ARMFastISel::ARMComputeRegOffset(const Value *Obj, unsigned &Reg,
ARMCC::CondCodes Pred = ARMCC::AL;
unsigned PredReg = 0;
- if (!AFI->isThumbFunction())
+ if (!isThumb)
emitARMRegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
Reg, Reg, Offset, Pred, PredReg,
static_cast<const ARMBaseInstrInfo&>(TII));
@@ -435,8 +439,6 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg,
unsigned Reg, int Offset) {
assert(VT.isSimple() && "Non-simple types are invalid here!");
-
- bool isThumb = AFI->isThumbFunction();
unsigned Opc;
switch (VT.getSimpleVT().SimpleTy) {
@@ -475,7 +477,6 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg,
bool ARMFastISel::ARMMaterializeConstant(const ConstantInt *CI, unsigned &Reg) {
unsigned Opc;
bool Signed = true;
- bool isThumb = AFI->isThumbFunction();
EVT VT = TLI.getValueType(CI->getType(), true);
switch (VT.getSimpleVT().SimpleTy) {
@@ -518,8 +519,6 @@ bool ARMFastISel::ARMStoreAlloca(const Instruction *I, unsigned SrcReg) {
bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg,
unsigned DstReg, int Offset) {
- bool isThumb = AFI->isThumbFunction();
-
unsigned StrOpc;
switch (VT.getSimpleVT().SimpleTy) {
default: return false;
@@ -615,7 +614,7 @@ bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
// No Thumb-1 for now.
- if (AFI->isThumbFunction() && !AFI->isThumb2Function()) return false;
+ if (isThumb && !AFI->isThumb2Function()) return false;
switch (I->getOpcode()) {
case Instruction::Load:
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