summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMFastISel.cpp
diff options
context:
space:
mode:
authorEric Christopher <echristo@apple.com>2010-09-27 06:08:12 +0000
committerEric Christopher <echristo@apple.com>2010-09-27 06:08:12 +0000
commit0720611e3a7f4f85e5bb52bb60fbc7247d19d812 (patch)
tree3128fba65b4fd410a23335cc6a8a30b82bda5737 /llvm/lib/Target/ARM/ARMFastISel.cpp
parent29ab6d1f8227169379905bf47a3bedc58687b110 (diff)
downloadbcm5719-llvm-0720611e3a7f4f85e5bb52bb60fbc7247d19d812.tar.gz
bcm5719-llvm-0720611e3a7f4f85e5bb52bb60fbc7247d19d812.zip
Insert missing coherency in comment. Add a quick check for hardware
divide support also. llvm-svn: 114813
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFastISel.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp10
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 7d56745d1b0..e84989c10bb 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -1144,9 +1144,13 @@ bool ARMFastISel::SelectSDiv(const Instruction *I) {
const Type *Ty = I->getType();
if (!isTypeLegal(Ty, VT))
return false;
-
- // If we have integer div support we should have gotten already, emit a
- // libcall.
+
+ // If we have integer div support we should have selected this automagically.
+ // In case we have a real miss go ahead and return false and we'll pick
+ // it up later.
+ if (Subtarget->hasDivide()) return false;
+
+ // Otherwise emit a libcall.
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
if (VT == MVT::i16)
LC = RTLIB::SDIV_I16;
OpenPOWER on IntegriCloud