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| author | Geoff Berry <gberry@codeaurora.org> | 2017-12-14 18:06:25 +0000 |
|---|---|---|
| committer | Geoff Berry <gberry@codeaurora.org> | 2017-12-14 18:06:25 +0000 |
| commit | dcc646e40b9a39397fafc6b0f534a0f7235fc911 (patch) | |
| tree | 6ffbff487ed37b82bd6a6a8ef2b2df6382d1a854 /llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | |
| parent | 0cc6b8ec6114308a4660586bbd0d58080b1690ea (diff) | |
| download | bcm5719-llvm-dcc646e40b9a39397fafc6b0f534a0f7235fc911.tar.gz bcm5719-llvm-dcc646e40b9a39397fafc6b0f534a0f7235fc911.zip | |
[ARM] Fix isRenamable flag setting on expanded VSTMDIA opcode.
Fixes expensive-check ARM buildbot failure.
llvm-svn: 320718
Diffstat (limited to 'llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp index 1c64e3d1a1c..f1def9822c2 100644 --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -1469,7 +1469,9 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB, unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); // Copy the destination register. - MIB.add(MI.getOperand(OpIdx++)); + MachineOperand Dst(MI.getOperand(OpIdx++)); + Dst.setIsRenamable(false); + MIB.add(Dst); // Copy the predicate operands. MIB.add(MI.getOperand(OpIdx++)); |
