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| author | Tim Northover <tnorthover@apple.com> | 2013-10-01 14:33:28 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-10-01 14:33:28 +0000 |
| commit | d840745829ba8526def212da39024caf7e269179 (patch) | |
| tree | c8f2ac417e31e2d4557d61b1ed89aeeab6b0dc97 /llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | |
| parent | 96f013b8275f3b181acac707aad108e1e9503cd9 (diff) | |
| download | bcm5719-llvm-d840745829ba8526def212da39024caf7e269179.tar.gz bcm5719-llvm-d840745829ba8526def212da39024caf7e269179.zip | |
ARM: support interrupt attribute
This function-attribute modifies the callee-saved register list and function
epilogue (specifically the return instruction) so that a routine is suitable
for use as an interrupt-handler of the specified type without disrupting
user-mode applications.
rdar://problem/14207019
llvm-svn: 191766
Diffstat (limited to 'llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp index 2f7f1bfbf7c..109135e9009 100644 --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -962,6 +962,18 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB, ExpandMOV32BitImm(MBB, MBBI); return true; + case ARM::SUBS_PC_LR: { + MachineInstrBuilder MIB = + BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::SUBri), ARM::PC) + .addReg(ARM::LR) + .addOperand(MI.getOperand(0)) + .addOperand(MI.getOperand(1)) + .addOperand(MI.getOperand(2)) + .addReg(ARM::CPSR, RegState::Undef); + TransferImpOps(MI, MIB, MIB); + MI.eraseFromParent(); + return true; + } case ARM::VLDMQIA: { unsigned NewOpc = ARM::VLDMDIA; MachineInstrBuilder MIB = |
