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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-06-15 17:46:54 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-06-15 17:46:54 +0000 |
commit | a15a224db0cfc02fbbbaffe297c06259d8340feb (patch) | |
tree | f7e5102b0c7e0aee60cb5dd228ef634cbf17d29e /llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | |
parent | 5767ad727cd94d55454b96bafe8cfee80b044021 (diff) | |
download | bcm5719-llvm-a15a224db0cfc02fbbbaffe297c06259d8340feb.tar.gz bcm5719-llvm-a15a224db0cfc02fbbbaffe297c06259d8340feb.zip |
Preserve <undef> flags in ARMExpandPseudo.
This probably mostly shows up in bugpoint-generated code.
llvm-svn: 158527
Diffstat (limited to 'llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp index ac9163f13db..a242b138893 100644 --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -459,22 +459,23 @@ void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) { MIB.addOperand(MI.getOperand(OpIdx++)); bool SrcIsKill = MI.getOperand(OpIdx).isKill(); + bool SrcIsUndef = MI.getOperand(OpIdx).isUndef(); unsigned SrcReg = MI.getOperand(OpIdx++).getReg(); unsigned D0, D1, D2, D3; GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3); - MIB.addReg(D0); + MIB.addReg(D0, getUndefRegState(SrcIsUndef)); if (NumRegs > 1 && TableEntry->copyAllListRegs) - MIB.addReg(D1); + MIB.addReg(D1, getUndefRegState(SrcIsUndef)); if (NumRegs > 2 && TableEntry->copyAllListRegs) - MIB.addReg(D2); + MIB.addReg(D2, getUndefRegState(SrcIsUndef)); if (NumRegs > 3 && TableEntry->copyAllListRegs) - MIB.addReg(D3); + MIB.addReg(D3, getUndefRegState(SrcIsUndef)); // Copy the predicate operands. MIB.addOperand(MI.getOperand(OpIdx++)); MIB.addOperand(MI.getOperand(OpIdx++)); - if (SrcIsKill) // Add an implicit kill for the super-reg. + if (SrcIsKill && !SrcIsUndef) // Add an implicit kill for the super-reg. MIB->addRegisterKilled(SrcReg, TRI, true); TransferImpOps(MI, MIB, MIB); |